The enterprise server market has began getting attention-grabbing once more over the course of the previous yr, as AMD returned to the fray with its EPYC platform to go head-to-head with Intel’s Xeon chips. Now, each corporations have detailed new processors which might be coming in 2019, which show their respective serious about the developments which might be shaping the fashionable datacentre.
Things have modified considerably for the reason that EPYC launch in the midst of 2017. AMD now has its chips in enterprise programs from Dell EMC, HPE, Cisco and Supermicro, and is steadily gaining market share.
Meanwhile, Intel seems to have hit a couple of bumps within the street, with stories that it’s having problem supplying sufficient chips to fulfill demand, whereas the introduction of its 10nm chip know-how has been delayed but once more till someday in 2019.
As is perhaps anticipated, each corporations have opted to extend the variety of processor cores per socket to spice up efficiency. However, every has their very own particular enhancements, with AMD delivering extra directions per clock (IPC) by way of a brand new microarchitecture, whereas Intel provides new directions aimed toward accelerating deep studying workloads and help for Intel’s Optane reminiscence know-how for use in DIMM slots.
Intel’s choices, codenamed Cascade Lake, symbolize the subsequent technology of the Xeon Scalable household. These are due for an official launch in early 2019, however Intel has disclosed particulars of one of many top-end components, Cascade Lake Advanced Performance (AP), which is able to boast as much as 48 cores and have 12 DDR4 reminiscence channels, permitting for double the reminiscence capability of present Xeons.
Meanwhile, AMD can be readying the subsequent technology of EPYC, codenamed Rome, for launch in 2019, primarily based on up to date Zen 2 cores. This tops out with a formidable 64 cores per socket, double that of the prevailing EPYC household, however retains the eight DDR4 reminiscence channels and 128 lanes of PCIe I/O so the brand new chips will slot in the identical motherboard sockets as the primary technology.
However, PCIe help has now been upgraded to PCIe 4.0 normal, which presents twice the bandwidth per lane in contrast with present PCIe 3.0, which ought to ship quicker throughput when used with gadgets corresponding to NVMe SSDs and Ethernet adapters which might be suitable with PCIe 4.0.
Under the hood
There are some surprises whenever you have a look at what’s contained in the chip bundle of those new processors. Both Cascade Lake AP and the Rome EPYC are multi-chip packages (MCPs), which means they’re made up of a couple of silicon chip, with inner connections tying them collectively.
In Intel’s case, Cascade Lake AP is successfully two 24-core chips joined collectively, since different Cascade Lake SKUs are set to have six DDR4 reminiscence channels, the identical as the present Skylake technology.
The chips are linked utilizing one Ultra Path Interconnect (UPI) hyperlink from every, with the identical sort of hyperlink used to attach between sockets externally (Cascade Lake AP helps one or two sockets).
AMD’s present EPYC chips are made up of 4 separate “chiplets”, cross-linked with the Infinity Fabric high-speed interconnect. The upcoming Rome EPYC chips, nonetheless, are radically totally different, comprising a single I/O and reminiscence controller chip that’s surrounded by as much as eight chiplets, every of which carries eight Zen 2 cores.
This separation means the I/O and reminiscence controller may be manufactured utilizing the identical 14nm course of used for the primary EPYC chips, whereas the brand new Zen 2 chiplets are made utilizing a more moderen 7nm course of.
Those Zen 2 cores additionally boast some architectural enhancements, with the width of the floating level models doubled to 256 bits, plus an improved department predictor and higher instruction pre-fetching.
As a end result, the brand new EPYC chips boast a 29% enchancment in IPC over the primary technology. AMD additionally claims it has halved the ability consumption per operation in Zen 2.
As Cascade Lake is staying placed on Intel’s 14nm manufacturing course of, it may appear there are few variations between the upcoming chips and the prevailing Xeon Scalable household.
However, Intel has added some unspecified mitigations to fight the Spectre and Meltdown vulnerabilities, in addition to new Vector Neural Network Instructions (VNNI) to speed up deep studying duties, and help for Intel’s Optane DC Persistent Memory DIMMs.
With VNNI, often known as Intel Deep Learning Boost, the agency is claiming a efficiency enchancment of as much as 17X over the Skylake household, because of the flexibility to deal with INT8 convolutions in a single step reasonably than three separate steps for the AVX-512 directions. However, this clearly requires software code to be optimised for Cascade Lake.
Meanwhile, Intel’s Optane DC Persistent Memory is now accessible as a brand new tier within the reminiscence hierarchy between DRAM and storage, owing to its larger latency however better capability. It is obtainable now in DIMM kind consider 128GB, 256GB and 512GB capacities, whereas lately launched 256GB DIMMS are the biggest accessible DRAM capability in the meanwhile.
Intel envisages Cascade Lake servers fitted with a mix of DRAM and Optane. Two modes are supported; App Direct Mode and Memory Mode. The first is meant for software program that’s Optane-aware and may select whether or not knowledge ought to go into DRAM or the bigger, persistent Optane reminiscence.
In Memory Mode, DRAM acts as a cache for the Optane reminiscence, with the processor’s reminiscence controller making certain essentially the most incessantly accessed knowledge is in DRAM.
Intel due to this fact appears to be following a technique of including optimisations to speed up particular workloads, corresponding to deep studying directions and Optane reminiscence, the latter of which might show helpful for in-memory databases or analytics. However, these will usually require code to be particularly written to help these options.
AMD, however, is pushing the value/efficiency proposition by providing a lot of cores at a low worth level – because it did with the primary technology EPYC – in addition to higher efficiency per watt.
It needs to be famous that neither Intel nor AMD has detailed costs for the brand new chips but, however Intel’s top-end Skylake chips have been priced in extra of $10Okay, a number of instances that of the top-end EPYC, and it appears doubtless this worth distinction will proceed.